1. Field of the Invention
The present invention relates to a semiconductor integrated circuit apparatus and a circuit board and an information readout method, and more particularly, to a semiconductor integrated circuit apparatus which is mounted on a predetermined circuit board for operation, and a circuit board on which the semiconductor integrated circuit apparatus is mounted, and an information readout method.
2. Description of Related Art
Conventionally, semiconductor integrated circuit apparatuses are subjected to tests in each step of the manufacturing process to sort out non-defective components.
For example, a burn-in test is performed on a semiconductor wafer to sort non-defective components from defective components in a plurality of chips formed on the semiconductor wafer after process steps are completed. Since a plurality of semiconductor integrated circuit apparatuses formed on the semiconductor wafer are collectively subjected to the test, a problem arises in that the states of the individual semiconductor integrated circuit apparatuses cannot be seen during the test. To address this, a semiconductor integrated circuit apparatus has been proposed in which a chip ID hold circuit is provided for holding chip IDs which allow identification of each chip, and when ID data matching a chip ID is input, a select signal for indicating the selection is provided to output an electric signal for representing electric characteristics unique to that semiconductor integrated circuit apparatus (for example, see Japanese Patent Application Laid-Open No. 11-121566, Paragraph Nos. 14 to 15, 20, and FIG. 1). This allows selection of one of the plurality of semiconductor integrated circuit apparatuses to monitor its state during the test.
A semiconductor integrated circuit apparatus selected as a non-defective component in the burn-in test performed on the wafer is cut out from the wafer. The semiconductor integrated circuit apparatus in this state is hereinafter referred to as a semiconductor chip. Subsequently, the semiconductor chip is subjected to a bonding process in which it is electrically connected to a lead frame through a bonding wire. In addition, it is sealed with a thermosetting resin or the like. The semiconductor integrated circuit apparatus in this state is referred to as a semiconductor package. The completed semiconductor package is inserted into a handler, connected to an LSI tester, and subjected to various types of tests such as a function test to sort out non-defective components. The semiconductor package is also subjected to a reliability test such as the burn-in test and then shipped and mounted on a printed circuit board of an electric device.